More to RCAT than Samsung

In the constant quest to increase the density of memory bits in each square millimeter of silicon, DRAM makers have looked up and down. First, there were storage capacitors stacked above the active devices. Then IBM developed trench technology (now widely exploited by Qimonda) to bury the capacitor deep into the substrate.

More recently, Samsung introduced a trench design, not for the capacitor, but for the cell access transistor. Samsung was already exploiting the area above the active area with stacked capacitors over the bit lines. Early last year, the Samsung processing team started a move in the other direction. The so-called Recessed Cell Array Transistor ? or RCAT ? exploited the vertical dimension into the substrate to fit a longer channel FET into the space of a more aggressively scaled device. This meant lower cell leakage and relaxed refresh cycle design.

It appears now that the concept is really catching on. The image sensor group from Samsung announced a trench transistor for its pixel transfer gate at IEDM last week. Now other companies are jumping on the bandwagon. Hynix uses an RCAT design in their 80nm 512M DDR2 DRAM that is very similar to Samsung?s original design.

Now that the RCAT is expanding its presence in the semiconductor community, the originators of the design are taking it one step further. Samsung uses a Sphere-Shaped Recessed Channel Access Transistor (S-RCAT) in their 80nm DRAM process that is? currently under the intense scrutiny of SI?s process analysis gurus. Samsung detailed this second generation trench FET as a solution for 70nm and beyond at VLSI Technology 2005, but those seeking more intimate details will have to wait for an upcoming report from SI.

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