SemiSerious

AMD added the Quad Core Barcelona to its server lineup of microprocessors this week. Many, including AMD’s own Hector Ruiz, have said this launch is at least six months late. But AMD is clearly the first to achieve a “native” quad core MPU with four processing cores monolithically integrated onto one piece of silicon. Intel’s current approach is to package two dual core dies together.

The AMD approach offers several advantages, most notably communication between each processing unit is on-chip rather than through a slower system bus. Intel disputes the viability of a native quad core design at 65nm, saying it would be too expensive until 45nm.

A quick look at the numbers shows that the AMD native quad and the 2X dual core Intel devices consume the exact same amount of silicon real estate (about 280 square millimetres). But that’s where the similarities end.

Intel uses almost double the 4.5 megabytes of on-chip SRAM memory cache found on AMD’s Barcelona. AMD has optimized their use of this smaller SRAM by sharing a 2 megabyte chunk of L3 cache between all four cores whereas Intel forces 8.25 megabytes into an even split of dedicated caches within each core.

The most significant boast of the Barcelona is the inclusion of the Northbridge memory controller IP block on die. To me, it looks like AMD have packed a lot into the Barcelona, but the die architecture does not seem to be pushing the envelope too hard. The design appears to be very conservative with some unused space between circuit blocks. Although Intel will launch a 45nm product before AMD, I would bet on AMD getting their quad core devices onto the 45nm platform with more ease, if not sooner.

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