SemiSerious

Toshiba is the first flash manufacturer to incorporate a high-K dielectric in their product. Their innovative inter-poly dielectric has allowed Toshiba to scale their floating gate flash memory to 43nm. The 16Gbit multi-level cell (MLC) device from Toshiba sets the new high watermark for NAND flash bit density at 139Mbits/mm².

Samsung claimed the first implementation of high-K dielectric for flash. However, that was for a charge-trapping (CTF) device they expected to roll out for 4Xnm. By now, we have all heard a lot about TANOS flash from Samsung. There is no floating gate with CTF, so the high-K material is in the tunnel oxide between the silicon channel and the control gate of the memory cell. The TANOS concept first announced by Samsung at IEDM 2005 was an extension to the generic SONOS approach of an oxide/nitride/oxide sandwich for charge trapping much like the so-called O-N-O inter-poly dielectric routinely used to separate the control and floating gate in traditional flash devices. The SONOS acronym was derived from the silicon on top (poly gate) of the dielectric and the silicon substrate underneath. SANOS CTF devices increased the dielectric constant of the charge trapping dielectric to allow the layers to electrically scale without sacrificing reliability by physically thinning the layers. The ‘A’ in SANOS comes from the aluminum-oxide high-K material. The last step to get to TANOS was for Samsung to substitute a tantalum-nitride metal gate in their CTF.

The bottom line from that wordy, acronym-laden paragraph is that floating gate was supposedly running out of steam and CTF devices were going to replace them. That’s what generated all the buzz and all the lovely new acronyms. Despite many “expert” predictions over the years, reports of the death of floating gate flash are greatly exaggerated. On the contrary, floating gate technology continues to dominate the market. I wonder if the floating gate technologists at Toshiba are having a good laugh because they were first to market with high-K which was a big part of the CTF that was supposed to put them out of business.

Many more details on this innovative flash process from Toshiba are available from Semiconductor Insights.

Our marketing teamrecently launched the latest instance of the popular Insight Awards Program. We are rabidly seeking your submissions to the contest. This year, it is a coordinated event between EE Times, Portelligent, and Semiconductor Insights.

If you haven’t heard about this program before, it is a chance to use us to showcase your technology. But first, you need to submit your samples. Then Semiconductor Insights’ and Portelligent’s crack teams of technology analysts will compare your device to your competition. We pick the winner and publish the results in several prestigious media outlets such as EE Times.

An Insight Award will be presented to the most innovative device in each of these categories:

• Process Technology
• Mobile Processor
• Non-volatile Memory
• DRAM

Mobile processor is a brand-new award. Our technology “academy” will compare the field according to such key metrics as power consumption, package design, thermal design, and integration. The selection committee includes these industry luminaries:

• Ed Keyes, CTO of SI
• David Carey, President of Portelligent
• Patrick Mannion, EditorialDirectorof TechOnline

along with senior Semiconductor Insights analysts specializing in each category.

Our second new category is reserved not for an actual IC but for the Best Patent Coverage of a Technical Innovation.

For a list of previous winners, go to 2007 winners. The Insight Awards will help your product achieve the recognition it deserves. The Insight Award Team feels strongly that there are a number of important benefits:

• Opportunity to be showcased in an SI authored article published in a major electronics publication
• Technical documentation including summary of winning highlights, device description, 3rd party validation of technical claims, and an Insight Report
• Award presented during the AceAward gala dinner
• Press release announcing each winner
• Recognition on SI and EETimes/ACEAwards websites
• Two posters highlighting an innovative technology area of the device delivered to you

I think they left out the cool plexiglas sculpture (design still TBD) which should be reason enough to submit your product. Joking aside, it is a great opportunity to get objective third party validation for yourtechnology. You get worldwide bragging rights for a full year, and it’s another way for the engineers and the rest of your product team to feel good about their accomplishment. Past recipients look on their awards with pride every day and are inspired to create the next big thing in tech.

If you are interested in nominating a device or have any other questions about this program, please contact program coordinator, Crystal Carty (crystallc@semiconductor.com) at SI.