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TSMC 40nm Technology

TSMC recently launched their 40nm process technology. The first devices to roll out of Hsinchu were Altera’s Stratix IV FPGA’s. Semiconductor Insights process analysis team was the first to dig into TSMC’s newest offering.

TSMC’s 40nm process is a big milestone. They are the first foundry besides IBM to use embedded SiGe source/drains. The eSiGe provides compressive strain in the PFET channel to improve hole mobility which in turn increases current drive for the transistor. This TSMC technology milestone is arguably the most interesting discovery of the SI analysis team according to its author and Senior Process Analyst, Xu Chang. The shape of the SiGe source/drain regions is very distinctive in the TSMC 40nm device. Xu and his analysis colleagues have looked at every generation of both Intel and AMD/IBM eSiGe. The TSMC processing is very different than any other device to hit the market.

Unfortunately, that’s about all I can say about the TSMC device if I expect to keep my job. As much as they love SemiSerious, my bosses aren’t interested in supplying free reverse engineering data to increase readership. If you want to learn more, you need to buy the full report.

Moving a little past the “full” node of 45nm is a trend that seems to be developing – in two ways. First,  intermediate nodes are appearing. Some are almost skipping 45nm altogether with very little production planned. Of course, I’m talking about the IBM Common Platform who referred to 45nm as a “weak node.” They have focused all their energy onto 32nm As part of their announcements about their 32nm technology, IBM is talking about how easy it will be for customers to move from 32nm to 28nm.

I should also note that we did not detect any kill switches or other “rogue additions” as described in IEEE last year. That article is definitely worth reading even though it’s almost a year old. (I know. It’s inconceivable in the Twitter age.) I jumped on the link there because of Spectrum Online’s coverage of chips designed to thwart reverse engineers like me. That topic appears to be heating up because of the discovery of latent malware on some computers controlling several electrical utility operations in the US. With renewable energy adoption needing our power grid to get smarter, the use of typical mass market PC’s with cheap, off-the-shelf components was probably the one area Obama was counting on saving a few bucks of stimulus money. So were his new CTO, Aneesh Chopra, and CIO, Vivek Kundra. Imagine if someone suddenly decided to standardize on secure, military-grade microprocessors for every computer connected to the US power grid? Photovoltaic panel sales would no longer be dependent subsidies. We would all be paying so much to the power company for our electricity that a few thousand bucks for solar panels and batteries might seem pretty cheap.

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