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	<title>SemiSerious &#187; Event Coverage</title>
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	<link>http://www.semiconductorblog.com</link>
	<description>Revealing commentary and news about the semiconductor industry.</description>
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		<title>MISFETs at VLSLI 2009</title>
		<link>http://www.semiconductorblog.com/2009/06/14/misfets-at-vlsli-2009/</link>
		<comments>http://www.semiconductorblog.com/2009/06/14/misfets-at-vlsli-2009/#comments</comments>
		<pubDate>Mon, 15 Jun 2009 03:22:20 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Game consoles]]></category>
		<category><![CDATA[ITRS]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Memory]]></category>
		<category><![CDATA[Process]]></category>
		<category><![CDATA[16nm]]></category>
		<category><![CDATA[Ge MISFET]]></category>
		<category><![CDATA[High-K]]></category>
		<category><![CDATA[HKMG]]></category>
		<category><![CDATA[intel]]></category>
		<category><![CDATA[Toshiba]]></category>
		<category><![CDATA[VLSI Symposium]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/?p=331</guid>
		<description><![CDATA[

I mentioned elsewhere that Intel&#8217;s approach of removing the oxide interlayer prior to high-K dielectric deposition was a significant advance on the road to scaling HKMG processes for the 16nm node.  This  joint effort with Sematech and UT Dallas will be presented at VLSI Technology Symposium 2009. Intel&#8217;s oxide-less gate stack technique might be signaling [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>2009 Insight Award Winners</title>
		<link>http://www.semiconductorblog.com/2009/04/13/insight-award-winners/</link>
		<comments>http://www.semiconductorblog.com/2009/04/13/insight-award-winners/#comments</comments>
		<pubDate>Mon, 13 Apr 2009 17:18:36 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Semiconductor Insights]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/?p=261</guid>
		<description><![CDATA[In the TechInsights tradition, every attempt is made to inspire those designers, engineers and builders who actually do the work of creating technology. To highlight this, a special awards ceremony was held recently in San Francisco. As many of you know, Semiconductor Insights has offered leading technology companies a chance to showcase their best efforts [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>ISSCC 2009</title>
		<link>http://www.semiconductorblog.com/2009/02/24/isscc-2009/</link>
		<comments>http://www.semiconductorblog.com/2009/02/24/isscc-2009/#comments</comments>
		<pubDate>Wed, 25 Feb 2009 02:25:13 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/?p=235</guid>
		<description><![CDATA[Looking forward in the current economic climate is so depressing, it&#8217;s worth a look back at an event from a couple of weeks ago &#8211; ISSCC. I had the opportunity to stay in snowy Ottawa while getting updated on the events of the week remotely by three of the SI engineering team.
Aaron Murray pointed out [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2009/02/24/isscc-2009/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
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		<title>Intel at ISSCC 2009</title>
		<link>http://www.semiconductorblog.com/2009/02/10/intel-at-isscc-2009/</link>
		<comments>http://www.semiconductorblog.com/2009/02/10/intel-at-isscc-2009/#comments</comments>
		<pubDate>Tue, 10 Feb 2009 14:28:47 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Semiconductor Insights]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/?p=219</guid>
		<description><![CDATA[Considering this won&#8217;t go up until the third day of the conference, it just wouldn&#8217;t be right to call this &#8220;a preview.&#8221; However, last week, I had a chance to get just that from Mark Bohr as he provided an overview of Intel&#8217;s contribution to this year&#8217;s ISSCC program. Intel is very well-represented at the [...]]]></description>
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		<slash:comments>1</slash:comments>
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		<item>
		<title>IEDM 2008 Preview</title>
		<link>http://www.semiconductorblog.com/2008/12/11/iedm-2008-preview/</link>
		<comments>http://www.semiconductorblog.com/2008/12/11/iedm-2008-preview/#comments</comments>
		<pubDate>Fri, 12 Dec 2008 03:58:56 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Industry News]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2008/12/11/iedm-2008-preview/</guid>
		<description><![CDATA[Leaving things until the last minute is certainly nothing new for me, but I might be better off waiting to summarize next week&#8217;s IEDM than trying to preview it here. These days, there is a constant flow of negative news in the chip industry and the wider economy, so thinking about the research and development [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Enough Already</title>
		<link>http://www.semiconductorblog.com/2008/08/18/enough-already/</link>
		<comments>http://www.semiconductorblog.com/2008/08/18/enough-already/#comments</comments>
		<pubDate>Mon, 18 Aug 2008 21:30:23 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Memory]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2008/08/18/enough-already/</guid>
		<description><![CDATA[For years the question, “How much is enough?” has been debated regarding NAND flash endurance. How many write cycles do you really need over the lifetime of a camera card or memory stick? How long do you need your portable data to stay intact?
SI’s senior memory analyst, Young Choi, attended the recent Flash Memory Summit [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Lon-Dan Calling</title>
		<link>http://www.semiconductorblog.com/2008/03/20/lon-dan-calling/</link>
		<comments>http://www.semiconductorblog.com/2008/03/20/lon-dan-calling/#comments</comments>
		<pubDate>Thu, 20 Mar 2008 21:01:37 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Semiconductor Insights]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2008/03/20/lon-dan-calling/</guid>
		<description><![CDATA[I am in London this week and just wrapped things up at the Intertech-Pira Image Sensor Conference. It was an interesting event with a diverse programme. There was everything from cameraphones to disposable endoscopes to swarms of robotic surveillance insects. Wait. The bugs were just my own nutty comment lifted from IEEE Spectrum. After a [...]]]></description>
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		<slash:comments>4</slash:comments>
		</item>
		<item>
		<title>45nm Mistry</title>
		<link>http://www.semiconductorblog.com/2007/12/12/45nm-mistry/</link>
		<comments>http://www.semiconductorblog.com/2007/12/12/45nm-mistry/#comments</comments>
		<pubDate>Wed, 12 Dec 2007 20:46:40 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Process]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/12/12/45nm-mistry/</guid>
		<description><![CDATA[Okay, so this post is a day after the news, but that&#8217;s still better than posting beforehand to create the appearance of a scoop. Yesterday, Intel&#8217;s much anticipated presentation of their 45nm process was held at IEDM in Washington. Although I suggested last week that Intel would reveal certain details of their process, much of it still remains [...]]]></description>
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		<slash:comments>2</slash:comments>
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		<item>
		<title>Intel DFV</title>
		<link>http://www.semiconductorblog.com/2007/12/06/intel-dfv/</link>
		<comments>http://www.semiconductorblog.com/2007/12/06/intel-dfv/#comments</comments>
		<pubDate>Thu, 06 Dec 2007 22:46:52 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Process]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/12/06/intel-dfv/</guid>
		<description><![CDATA[

 
At the Common Platform Technology Forum last month, the design for manufacturing (DFM) session message was, “not if but when the industry will have to move to structured gate layouts.” Intel already has.
The industry is at a point where design for variability (DFV) is required. The old approach would be to add margin, but design [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2007/12/06/intel-dfv/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Design, Build, Fail and Test</title>
		<link>http://www.semiconductorblog.com/2007/11/07/design-build-fail-and-test/</link>
		<comments>http://www.semiconductorblog.com/2007/11/07/design-build-fail-and-test/#comments</comments>
		<pubDate>Wed, 07 Nov 2007 22:03:16 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[ITRS]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Process]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/11/07/design-build-fail-and-test/</guid>
		<description><![CDATA[While attending the IBM and associates Common Technology Platform Forum this afternoon, it occured to me that I was bridging the gap between the design community and trying to get it right, and the failure analysis community that steps in too often to mention in polite company. That&#8217;s because I am also in San Jose [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2007/11/07/design-build-fail-and-test/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>The IFM</title>
		<link>http://www.semiconductorblog.com/2007/11/06/the-ifm/</link>
		<comments>http://www.semiconductorblog.com/2007/11/06/the-ifm/#comments</comments>
		<pubDate>Tue, 06 Nov 2007 21:00:36 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[ITRS]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Process]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/11/06/the-ifm/</guid>
		<description><![CDATA[The new buzz word &#8211; acronym actually &#8211; coming out of today&#8217;s IBM-Chartered-Samsung Common Platform Forum today here in Santa Clara is the term introduced by Qualcomm Senior VP and GM, Behrooz Abdi. His view of the consortium is to create an &#8220;integrated fabless manufacturer&#8221; or IFM akin to the IDM he means to displace. (Qualcomm [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2007/11/06/the-ifm/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>We&#8217;ve Got the Power</title>
		<link>http://www.semiconductorblog.com/2007/06/28/weve-got-the-power/</link>
		<comments>http://www.semiconductorblog.com/2007/06/28/weve-got-the-power/#comments</comments>
		<pubDate>Thu, 28 Jun 2007 20:30:59 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Process]]></category>
		<category><![CDATA[Uncategorized]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/06/28/weve-got-the-power/</guid>
		<description><![CDATA[
Trying to mute the old joke that compound semiconductors are the technology of the future and always will be, Dr. Vu Ho recently attended the 2007 International Conference on Compound Semiconductor Manufacturing Technology. The III-V compounds and related materials such as GaAs, GaN and InP have for years been a mainstay of advanced platforms in [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2007/06/28/weve-got-the-power/feed/</wfw:commentRss>
		<slash:comments>1</slash:comments>
		</item>
		<item>
		<title>2007 IEEE International Interconnect Technology Conference</title>
		<link>http://www.semiconductorblog.com/2007/06/19/2007-ieee-international-interconnect-technology-conference/</link>
		<comments>http://www.semiconductorblog.com/2007/06/19/2007-ieee-international-interconnect-technology-conference/#comments</comments>
		<pubDate>Tue, 19 Jun 2007 18:27:26 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Events]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Process]]></category>
		<category><![CDATA[Uncategorized]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/06/19/2007-ieee-international-interconnect-technology-conference/</guid>
		<description><![CDATA[A couple of weeks ago, my good friend and semiconductor analysis colleague, Mark Chambers, attended the IITC in San Francisco. The sessions were held from June 4 to 6 at the Hyatt Regency at San Francisco Airport. Because the dates spanned my wedding anniversary and wife&#8217;s birthday and the conference site was far from downtown, [...]]]></description>
		<wfw:commentRss>http://www.semiconductorblog.com/2007/06/19/2007-ieee-international-interconnect-technology-conference/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Image Sensors and Lobster &#8211; News from IISW</title>
		<link>http://www.semiconductorblog.com/2007/06/13/image-sensors-and-lobster-news-from-iisw/</link>
		<comments>http://www.semiconductorblog.com/2007/06/13/image-sensors-and-lobster-news-from-iisw/#comments</comments>
		<pubDate>Wed, 13 Jun 2007 19:29:32 +0000</pubDate>
		<dc:creator>Don Scansen</dc:creator>
				<category><![CDATA[Event Coverage]]></category>
		<category><![CDATA[Industry News]]></category>
		<category><![CDATA[Uncategorized]]></category>

		<guid isPermaLink="false">http://www.semiconductorblog.com/2007/06/13/image-sensors-and-lobster-news-from-iisw/</guid>
		<description><![CDATA[Easier than choosing a wine for shellfish was my decision to attend the 2007 International Image Sensor Workshop held last week in beautiful (literally &#8211; see the translation) Ogunquit, Maine. The huge lobster was served up with an even bigger dose of the latest research in imaging technology. The workshop &#8211; formerly known as CCD [...]]]></description>
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		<slash:comments>2</slash:comments>
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